WIP: CHERI Standard support #419

arichardson · 2025-04-22T19:08:43Z

No description provided.

arichardson · 2025-08-01T18:30:07Z

Will try to fix the CI failures and then merge to main.

jrtc27 · 2025-08-07T00:01:11Z

pycheribuild/projects/cross/opensbi.py

+
+    def setup(self):
+        super().setup()
+        self.make_args.set(FW_TEXT_START=0x80000000)


It's supposed to be 0. It's built as a PIE if possible. The expectation is it self-relocates at startup.

hmm yes, from what I can tell this is in fact redundant. Removing it appears to be working correctly.

@heshamelmatary I think you needed that, do you know what relies on it?

Without this, I get an error like the following when using fw_jump.elf as QEMU's -bios:

qemu-system-riscv64cheri: Some ROM regions are overlapping
These ROM regions might have been loaded by direct user request or by default.
They could be BIOS/firmware images, a guest kernel, initrd or some other file loaded into guest memory.
Check whether you intended to load all this guest code, and whether it has been built to load to the correct addresses.

The following two regions overlap (in the memory address space):
/home/hesham/cheri/output/cheri-alliance-sdk/opensbi/riscv64/share/opensbi/l64pc128/generic/firmware/fw_jump.elf ELF program header segment 0 (addresses 0x0000000000000000 - 0x00000000000241c0)
mrom.reset (addresses 0x0000000000001000 - 0x0000000000001028)

QEMU's loader uses the segments' addresses when loading ELF bioses. It will work fine if we just use the binary versions rather than ELFs, but sometimes (e.g., when debugging or when we only have ELF loaders), we need to pass the bios/opensbi as an ELF.

Ok, I think we discussed the error in chat but I forgot. I think I have never noticed this because the cheribuild run target always uses the binary image version. I think we are also only installing the binary version in the sdk directory, perhaps we should install also the ELF version?

The .bin file is the same as the .elf file, I don't understand why you'd ever need to pass the .elf file to QEMU instead (though I do personally believe that's the "nicer" thing to pass). Just because QEMU is given the .bin file doesn't mean you can't give the debugger the .elf.

But yes, it seems QEMU, like many things, forgets PIEs exist in its ELF loader.

For reference. riscv-software-src/opensbi#372
Which I think has been merged here qemu/qemu@55c1365

qwattash · 2025-08-07T08:11:23Z

Will try to fix the CI failures and then merge to main.

I added a WIP commit that points the cheri-alliance-llvm to a repository that currently works for us. I think this should not be merged until we have a good "official" llvm to point this to.

pycheribuild/projects/cross/opensbi.py

This adds a --riscv-cheri-isa flag to choose the target toolchain.

Co-authored-by: Hesham Almatary <[email protected]>

Otherwise it'll link to 0x0. Co-authored-by: Hesham Almatary <[email protected]>

Imitate morello-llvm to build CHERI Alliance's LLVM and QEMU for --riscv-cheri-isa std. This only applies to CHERI-RISC-V.

Depending on ISA switch --riscv-cheri-isa,use the appropriat SDK.

This is not currently supported by the Cheri Allliance LLVM.

Also delete unused Alliance target class

CI fails otherwise with an error: Traceback (most recent call last): File "<stdin>", line 22514, in <module> File "<stdin>", line 22851, in BuildCheriseL4Excercises NameError: name 'BuildAllianceOpenSBI' is not defined

Propagate the current CheriConfig depending whether the llvm_project is queried during early dependency resolution or during Project initialization.

This is only used for MIPS.

pycheribuild/projects/cross/llvm.py

This is similar to temporary_url_override for GitRepository, but introduces the temporary_branch_override argument that overrides the default branch.

Temporarily point the default branch of the cheri-alliance-llvm to a private repository with the latest rebased branch. This is necessary to build CheriBSD.

pycheribuild/config/compilation_targets.py

arichardson

LGTM

jrtc27 · 2025-08-13T16:48:03Z

pycheribuild/config/compilation_targets.py

@@ -84,8 +84,12 @@ def get_qemu_mfs_root_kernel(self, use_benchmark_kernel: bool) -> Path:

 @functools.lru_cache(maxsize=20)
 def _linker_supports_riscv_relaxations(linker: Path, config: CheriConfig, xtarget: "CrossCompileTarget") -> bool:
-    if xtarget.is_hybrid_or_purecap_cheri():
+    # XXX-AM: Hack: codasip lld does not seem to play nice with -mrelax and cheri


But CHERI is already handled by the existing code. All this does is change the plain RISC-V flags?

Will revert this, I also think it is redundant.

…flags. When selecting supported linker relaxations, double check that xtarget is a risc-v target before using the riscv_cheri_isa flag.

This is necessary to cross build binaries that work with c18n in CheriBSD.

This ignores -Wmissing-template-arg-list-after-template-kw.

Only enable flags when building for pure-capability targets.

arichardson · 2025-08-26T22:06:47Z

@qwattash once you are happy with this and CI passes, please feel free to merge.

When building on aarch64 hosts, mtree's entry returns None in --pretend mode.

New project to build and test CHERI Exercises running on CHERI-seL4 microkernel and its CHERI-Microkit userspace.

arichardson · 2025-09-16T04:00:14Z

pycheribuild/projects/disk_image.py

@@ -342,7 +342,12 @@ def add_from_mtree(
        if strip_binaries:
            # Try to shrink the size by stripping all elf binaries
            entry = self.mtree.get(mtree_path)
+            if entry is None:


this change seems wrong

The commit says that it's because when using --pretend the result here is None. @heshamelmatary
Is there a particular problem with this? @arichardson

arichardson · 2025-09-17T16:50:15Z

@qwattash once you are happy with this and CI passes, please feel free to merge.

Opened #435 which has some extra fixes.

arichardson requested a review from qwattash April 22, 2025 19:08

arichardson marked this pull request as draft April 22, 2025 19:30

arichardson force-pushed the riscv-std branch from ae53861 to db32962 Compare July 27, 2025 20:48

qwattash force-pushed the riscv-std branch from 7fa4c46 to 5d2dba9 Compare August 6, 2025 23:58

jrtc27 reviewed Aug 7, 2025

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qwattash reviewed Aug 7, 2025

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pycheribuild/projects/cross/opensbi.py Show resolved Hide resolved

arichardson and others added 2 commits August 8, 2025 10:51

[zcheri] Initial support for the RISC-V CHERI standard

c1a4b05

This adds a --riscv-cheri-isa flag to choose the target toolchain.

[zcheri] Honor riscv_cheri_isa configuration flag for CheriBSD builds.

648dda8

qwattash mentioned this pull request Aug 8, 2025

Zcheri risc-v integration. Temporary branch for CI #429

Closed

qwattash and others added 15 commits August 8, 2025 11:51

[zcheri] Add Cheri Alliance OpenSBI target with Zcheri support.

214485f

Co-authored-by: Hesham Almatary <[email protected]>

[zcheri] Default OpenSBI start to 0x80000000

9cb5bf0

Otherwise it'll link to 0x0. Co-authored-by: Hesham Almatary <[email protected]>

[zcheri] Added gfe build for cheri alliance opensbi

56fa427

[zcheri] Add CHERI Alliance SDK (QEMU and LLVM)

674df00

Imitate morello-llvm to build CHERI Alliance's LLVM and QEMU for --riscv-cheri-isa std. This only applies to CHERI-RISC-V.

[zcheri] Use CHERI Alliance SDK for CheriBSD targets.

4e18945

Depending on ISA switch --riscv-cheri-isa,use the appropriat SDK.

[zcheri] Add GDB target off CHERI Alliance

0262d09

[zcheri] Obey --riscv-cheri-isa in run-riscv64-xxx.

83a52b5

[zcheri] Honor --riscv-cheri-isa for baremetal targets.

af5f307

[zcheri] Add Cheri Alliance gdb for purecap rootfs target.

fae3ba9

[zcheri] Disable -mrelax for Zcheri ISA.

4fa1f28

This is not currently supported by the Cheri Allliance LLVM.

[zcheri] Fix sysroot path to alliance sdk

df3777e

Also delete unused Alliance target class

combine-files: Make sure opensbi.py precedes other projects

31abb57

CI fails otherwise with an error: Traceback (most recent call last): File "<stdin>", line 22514, in <module> File "<stdin>", line 22851, in BuildCheriseL4Excercises NameError: name 'BuildAllianceOpenSBI' is not defined

[zcheri] Fix llvm_test_suite llvm_project dependency resolution.

639be27

Propagate the current CheriConfig depending whether the llvm_project is queried during early dependency resolution or during Project initialization.

[zcheri] Drop unused unaligned option from BuildCheriAllianceQEMU.

ee6c8fe

This is only used for MIPS.

[qemu] Bump tracked branch in cheri-alliance-qemu.

953e90e

qwattash force-pushed the riscv-std branch from 5d2dba9 to 5932aa2 Compare August 8, 2025 12:27

arichardson commented Aug 8, 2025

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pycheribuild/projects/cross/llvm.py Outdated Show resolved Hide resolved

qwattash added 2 commits August 11, 2025 11:59

Add option to temporarily override the target git repository branch.

d44c481

This is similar to temporary_url_override for GitRepository, but introduces the temporary_branch_override argument that overrides the default branch.

[zcheri] Temporarily override the Cheri Alliance LLVM repository.

13cffcf

Temporarily point the default branch of the cheri-alliance-llvm to a private repository with the latest rebased branch. This is necessary to build CheriBSD.

qwattash force-pushed the riscv-std branch from 5932aa2 to 13cffcf Compare August 11, 2025 11:06

arichardson commented Aug 11, 2025

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pycheribuild/config/compilation_targets.py Outdated Show resolved Hide resolved

arichardson commented Aug 13, 2025

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jrtc27 reviewed Aug 13, 2025

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qwattash added 4 commits August 16, 2025 12:14

riscv: Check for risc-v target when using riscv_cheri_isa for linker …

2dbd2e1

…flags. When selecting supported linker relaxations, double check that xtarget is a risc-v target before using the riscv_cheri_isa flag.

riscv c18n: Ensure that we pass the correct vararg ABI flags to clang.

6036699

This is necessary to cross build binaries that work with c18n in CheriBSD.

grpc: Add -Wno-error to prevent Werror issues with newer compilers.

f1d4020

This ignores -Wmissing-template-arg-list-after-template-kw.

riscv: Fix c18n vararg abi flags for RISC-V.

9b96a56

Only enable flags when building for pure-capability targets.

[zcheri] Add cheri alliance u-boot target.

2dc1fad

arichardson marked this pull request as ready for review September 9, 2025 16:19

heshamelmatary added 4 commits September 12, 2025 14:14

Support aarch64 hosts when searching for libdir

96d2041

disk_image: Check if mtree entry is valid

f06cfcb

When building on aarch64 hosts, mtree's entry returns None in --pretend mode.

[zcheri][sel4] Add CHERI-seL4 and CHERI-Microkit

2d7fd92

[zcheri][sel4] Add a cheri-sel4-exercises target

7bbd56d

New project to build and test CHERI Exercises running on CHERI-seL4 microkernel and its CHERI-Microkit userspace.

arichardson commented Sep 16, 2025

View reviewed changes

arichardson marked this pull request as draft September 17, 2025 16:50

WIP: CHERI Standard support #419

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WIP: CHERI Standard support #419

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qwattash Aug 7, 2025 •

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